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Subject Syllabus

AD-503 (C) - Computer Org. & Architecture

AIDS · Semester 5

Course Modules

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Structure of desktop computers CPU: general register organization Memory register, instruction register, and control word Stack organization Instruction format ALU, I/O system, and bus CPU and memory program counter Bus structure Register transfer language: bus and memory transfer Addressing modes Basic concept of instruction and instruction types Microinstruction formats Fetch and execution cycle Hardwired control unit Microprogrammed control unit and microprogram sequencer Control memory Sequencing and execution of microinstructions

Addition and subtraction Two's complement representation Signed addition and subtraction Multiplication and division Booth's algorithm Division operation Floating-point arithmetic operation Design of arithmetic unit

I/O interface: PCI bus, SCSI bus, and USB Data transfer: serial, parallel, synchronous, and asynchronous modes Direct Memory Access (DMA)I/O processor

Main memory: RAM and ROM Secondary memory: magnetic tape, disk, and optical storage Cache memory: structure and design Mapping scheme Replacement algorithm Improving cache performance Virtual memory Memory management hardware

Characteristics of multiprocessors Structure of multiprocessor: interprocessor arbitration Inter-processor communication and synchronization Memory in multiprocessor systems Concept of pipelining Vector processing Array processing RISC and CISC Study of multicore processors: Intel and AMD