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Previous Year Question Paper

CSIT-304 - Digital Circuits & System (DSC)

November 2022•CSIT•SEMESTER-3
November 2022
Max Marks: 70
Duration: 3 Hours
Instructions:

• Attempt any five questions.

• All questions carry equal marks.

Q.1
a)Unit 1

Given the following Boolean function : F(W,X,Y,Z) = WX'(Y + Z') + X'.Z'(W'Y) where \Theta represents the XNOR operation, determine the simplified(minimal) SOP expression for F using boolean algebra and Implement the given function using NOR-NOR logic. [7 Marks]

b)Unit 1

Computer the prime implicants (PI) and essential prime implicants (EPI) in the following Boolean function F(W,X,Y,Z)=ΣM(1,3,5,7,8,9,11,12)+d(2,10)F(W, X, Y, Z) = \Sigma M(1, 3, 5, 7, 8, 9, 11, 12) + d(2, 10) Computer a minimal SOP expression for F and determine whether it is unique. [7 Marks]

Q.2
a)Unit 1

Each of the following functions actually represents a set of four functions, corresponding to the possible assignments of the don't-care terms. f1(w,x,y,z)=Σ(1,3,5,6,9,10)+Σ(11,12)f_1(w,x,y,z)=\Sigma(1,3,5,6,9,10)+\Sigma(11,12) f2(w,x,y,z)=Σ(0,3,4,5,8,9)+Σ(6,7)f_2(w,x,y,z)=\Sigma(0,3,4,5,8,9)+\Sigma(6,7)

i) Find f1=f2f_1=f_2. How many functions does f1f_1 represent?

ii) Find f1+f2f_1+f_2. How many functions does f4f_4 represent? [7 Marks]

b)Unit 1

Given the network of fig., determine the functions f1f_1 and f2f_2 if f1=xz+x′z′f_1 = xz + x'z' and the overall transmission function is to be f(w,x,y,z)=Σ(0,3,6,10,11,12)f(w,x,y,z) = \Sigma(0,3,6,10,11,12) alt='' [7 Marks]

Q.3
a)Unit 2

Design a 8×18 \times 1 multiplexer using one 4×14 \times 1 multiplexer and four 2×12 \times 1 multiplexers. [7 Marks]

b)Unit 2

Design a combinational logic circuit to convert the BCD to excess-3 code. [7 Marks]

Q.4
a)Unit 2

Design a 3×83 \times 8 decoder using one 2×42 \times 4 decoder and two 2×42 \times 4 decoder with Enable input. [7 Marks]

b)Unit 1

Draw a schematic for a minimal circuit that uses only NOR gates that performs the two's complement operation on a four bit input value. Let the input be A3A2A1A0A_3A_2A_1A_0 and the output be B3B2B1B0B_3B_2B_1B_0. [7 Marks]

Q.5
a)Unit 1

Covert Decimal to Binary

i) (1024)10_{10}

ii) (23.25)10_{10} [7 Marks]

b)Unit 3

Draw the state diagram for the following specification sequential systems: Input: x(t)∈{0,1}x(t) \in \{0,1\} Output: z(t)∈{0,1}z(t) \in \{0,1\} State: s(t)∈{Even, Odd}s(t) \in \{\text{Even, Odd}\} Initial state: s(0)=Evens(0) = \text{Even} Functions: The transition and output functions are s(t+1)=even if x(t) and y(t) both are evens(t+1) = \text{even if } x(t) \text{ and } y(t) \text{ both are even} s(t+1)=odd otherwises(t+1) = \text{odd otherwise} z(t)=1 if x(t) and y(t) both are evenz(t) = 1 \text{ if } x(t) \text{ and } y(t) \text{ both are even} z(t)=0 otherwisez(t) = 0 \text{ otherwise} alt='' [7 Marks]

Q.6
a)Unit 3

Design a synchronous counter to count in the random sequence 0, 2, 4, 5, 7, 0, 2, 4, 5, 7, ... using D flip-flop. [7 Marks]

b)Unit 3

Design a sequential circuit using T flip-flop for the following state table.

Present State S(t)Input X = 0Input X = 1
S1_1S1_1/1S2_2/0
S2_2S1_1/1S3_3/0
S3_3S2_2/1S4_4/0
S4_4S2_2/0S2_2/0
S(t+1)/ Output (Z)
Assume any suitable assumptions for state assignment. alt='' [7 Marks]
Q.7
a)Unit 4

Explain Interfacing between TTL and MOS with example. [7 Marks]

b)Unit 3

Explain the concept of working and applications of following memories.

i) ROM

ii) PLA

iii) DRAM

iv) FLASHRAM [7 Marks]

Q.8
Unit 4

i) A/D and D/A convertors [14 Marks]

Unit 4

ii) CMOS Logic [14 Marks]

Unit 5

iii) Shannon's theorem for channel capacity [14 Marks]

Unit 5

iv) Nyquist sampling theorem [14 Marks]